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FX3G/FX3U/FX3UC Series Programmable Controllers
Programming Manual - Basic & Applied Instruction Edition
13 High Speed Processing – FNC 50 to FNC 59
13.6 FNC 55 – HSZ / High Speed Counter Zone Compare
13.6 FNC 55 – HSZ / High Speed Counter Zone Compare
Outline
This instruction compares the current value of a high speed counter with two values (one zone), and outputs the
comparison result to three bit devices (refresh).
→ For the table high speed comparison mode, refer to Subsection 13.6.2.
→ For the frequency control mode, refer to Subsection 13.6.3.
1. Instruction format
2. Set data
3. Applicable devices
S1: "D.b" is available only in FX3U and FX3UC PLCs. However, index modifiers (V and Z) are not available.
S2: This function is supported only in FX
3U/FX3UC PLCs.
Explanation of function and operation
1. 32-bit operation (DHSZ)
The current value of a high speed counter (C235 to C255) specified in is compared with two comparison points
(comparison value 1 and comparison value 2). Based on the comparison result, "smaller than the lower comparison
value", "inside the comparison zone" or "larger than the upper comparison value", one among , +1 and
+2 is set to ON regardless of the operation cycle.
In this instruction, the comparison processing is executed after the count processing in the high speed counter.
Operand Type Description Data Type
Data to be compared with the current value of a high speed counter or word device
number storing data to be compared (comparison value 1)
32-bit binary
Data to be compared with the current value of a high speed counter or word device
number storing data to be compared (comparison value 2)
32-bit binary
Device number of a high speed counter [C235 to C255] 32-bit binary
Head bit device number to which the comparison result is output based on upper and
lower comparison values
Bit
Oper-
and
Type
Bit Devices Word Devices Others
System User Digit Specification System User
Special
Unit
Index Constant
Real
Number
Charac-
ter String
Pointer
XYMTCSD
.b KnX KnY KnM KnS T C D R
U\G
VZModify K H E "
"P
33333333
S
2
33 33
33333333
S
2
33 33
33
33 3
S
1
3
Mnemonic Operation Condition
32-bit Instruction
17 steps DHSZ
Continuous
Operation
16-bit Instruction
Mnemonic Operation Condition
−
FNC 55
HSZ
D
S
1
S
2
S
D
S
1
S
2
S
D
S
D
D
D
→
Set to ON.
Comparison
value 2
Comparison
source
Output
destination
S
1
FNC 55
DHSZ
K2,147,483,647
>
+1
+2
S
Comparison
value 1
S
1
D
S
2
S
S
S
1
S
S
S
2
S
2
D
D
D
→
→
≤≤
>
Command
input