Filter
Top Products
326 Software Developer’s Manual
Register Descriptions
Table 13-91. RAH Register Bit Description
13.5.4 VLAN Filter Table Array
1
VFTA[127:0] (05600h – 057FCh; R/W)
The Ethernet controller provides a 4096-bit vector VLAN Filter table array. There is one register
per 32 bits of the VLAN Filter Table, for a total of 128 registers (thus the VFTA[127:0]
designation). The size of the word array depends on the number of bits implemented in the VLAN
Filter table. Software must mask to the desired bit on reads, and supply a 32-bit word on writes.
Accesses to this table must be 32-bit.
The algorithm for VLAN filtering using the VFTA is identical to that used for the Multicast Table
Array. Refer to Section 13.5.1 for a block diagram of the algorithm. If VLANs are not used, there is
no need to initialize the VFTA.
31 30 18 17 16 15 0
AV Reserved AS RAH
Field Bit(s)
Initial
Value
Description
RAH 15:0 X
Receive address High
Contains the upper 16 bits of the 48-bit Ethernet address.
RAH0 should be used to store the upper 16-bit of the Ethernet
controller’s Ethernet MAC address.
AS 17:16 X
Address Select
Selects how the address is to be used in the address filtering.
00b = Destination address (required for normal mode)
01b = Source address
10b = Reserved
11b = Reserved
Reserved 30:18 0b
Reserved
Should be written with 0b to ensure future compatibility.
Reads as 0b.
AV 31 0b
Address Valid
Determines whether this address is compared against the
incoming packet. When set, the address is valid and is
compared against the incoming packet. When cleared, the
address is invalid and is not compared against the received
packet. AV is only cleared by a PCI reset or software reset. This
bit is unchanged by rx_reset.
1. Not applicable to the 82541ER.