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242 Software Developer’s Manual
Register Descriptions
Power Down 11
1b = Power down.
0b = Normal operation.
Power down shuts down the Ethernet
controller except for the MAC interface if
the MAC interface power down bit is set
to 1b. If it equals 0b, then the MAC
interface also shuts down. For the
82544GC/EI, power down has no effect
on the 125CLK output if the Disable
125CLK bit is set to 0b.
NOTE: Setting this bit to 1b will prevent
wakeup by detecting circuitry
on the CAT5 cable. To enable
wakeup, this bit must be written
back to 0b.
82544GC/EI only:
If bit 12 is set to 0b and speed is
manually forced to 1000 Mb/s in bits 13
and 6, then Auto-Negotiation is still
enabled and only 1000BASE-T full
duplex is advertised if bit 8 is set to 1b.
1000BASE-T half duplex is advertised if
bit 8 is cleared (0b). Duplex settings in
other registers are ignored. Auto-
Negotiation is required by IEEE for
proper operation in 1000BASE-T.
R/W 0b 0b
Table 13-16. PHY Control Register Bit Description
Field Bit(s) Description Mode HW Rst SW Rst