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264 Software Developer’s Manual
Register Descriptions
Speed and Duplex
Resolved
11
1b = Resolved.
0b = Not resolved.
Speed, Duplex, MDI Crossover Status,
Transmit Pause Enable, and Receive
Pause Enable bits are valid only after
the Speed and Duplex Resolved bit (11)
is set. This occurs when Auto-
Negotiation is completed or Auto-
Negotiation is disabled.
RO 0b 0b
Page Received 12
1b = Page received.
0b = Page not received.
RO,
LH
0b 0b
Duplex 13
1b = Full duplex.
0b = Half duplex.
The Duplex bit is valid only after the
Speed and Duplex Resolved bit (11) is
set. This occurs when Auto-Negotiation
is completed or Auto-Negotiation is
disabled.
RO 0b Retain
Speed 15:14
11b = Reserved.
10b = 1000 Mb/s.
01b = 100 Mb/s.
00b = 10 Mb/s.
The Speed bit is valid only after the
Speed and Duplex Resolved bit (11) is
set. This occurs when Auto-Negotiation
is completed or Auto-Negotiation is
disabled.
RO 00b Retain
Table 13-33. PHY Specific Status Register Bit Description
Field Bit(s) Description Mode HW Rst SW Rst