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Software Developer’s Manual 173
Ethernet Interface
Flow control capability must be negotiated between link partners via the Auto-Negotiation process.
The Auto-Negotiation process can modify the value of these bits based on the resolved capability
between the local device and the link partner.
Once the receiver has validated the reception of an XOFF, or PAUSE frame, the Ethernet controller
performs the following:
• Increment the appropriate statistics register(s)
• Set the TXOFF bit in the Device Status Register (STATUS)
• Initialize the pause timer based on the packet’s PAUSE timer field
• Disable packet transmission or schedule the disabling of transmission after the current packet
completes.
Resumption of transmission can occur under the following conditions:
• Expiration of the PAUSE timer
• Reception of on XON frame (a frame with its PAUSE timer set to 0b)
Either condition clears the STATUS.TXOFF bit and transmission can resume. Hardware records
the number of received XON frames in the XONRXC counter.
8.7.4 Discard PAUSE Frames and Pass MAC Control Frames
Two bits in the Receive Control register (RCTL) are implemented specifically for control over
receipt of PAUSE and MAC control frames. These bits are Discard PAUSE Frames (DPF) and Pass
MAC Control Frames (PMCF). See Section 13.4.22 for DPF and PMCF bit definitions.
The DPF bit forces the discarding of any valid PAUSE frame addressed to the Ethernet controller’s
station address. If the packet is a valid PAUSE frame and is addressed to the station address
(receive address [0]), the Ethernet controller does not pass the packet to host memory if the DPF bit
is set to logic high. When DPF is cleared to 0b, a valid flow control packet is transferred via DMA.
This bit has no affect on PAUSE operation, only the DMA function.
The PMCF bit allows for the passing of any valid MAC control frames to the system which do not
have a valid PAUSE opcode. In other words, the frame can have the correct MAC control frame
multicast address (or the MAC station address) as well as the correct type field match with the FCT
register, but does not have the defined PAUSE opcode of 0001h. Frames of this type are transferred
to host memory when PMCF is logic high.
8.7.5 Transmission of PAUSE Frames
Transmitting PAUSE frames is enabled by software writing a 1b to the CTRL.TFCE bit. This bit is
mapped to bit 8 of the TXCW txConfigWord field. (ASM_DIR bit).
Similar to the reception flow control packets described earlier, XOFF packets can be transmitted
only if this configuration has been negotiated between the link partners via the Auto-Negotiation
process. In other words, the setting of this bit indicates the desired configuration. The resolution of
the Auto Negotiation process is discussed in Sections 8.6.3 and 8.6.4.