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The following diagram requires AND LOAD to be converted to mnemonic
code because three pairs of parallel conditions lie in series. The two means
of coding the programs are also shown.
0000 0002 0004
0001 0003 0005
0100
Address Instruction Operands Address Instruction Operands
0000 LD 0000
0001 OR NOT 0001
0002 LD NOT 0002
0003 OR 0003
0004 AND LD ---
0005 LD 0004
0006 OR 0005
0007 AND LD ---
0008 OUT 0100
0000 LD 0000
0001 OR NOT 0001
0002 LD NOT 0002
0003 OR 0003
0004 LD 0004
0005 OR 0005
0006 AND LD ---
0007 AND LD ---
0008 OUT 0100
Again, with the method on the right, a maximum of eight blocks can be com-
bined. There is no limit to the number of blocks that can be combined with
the first method.
The following diagram requires OR LOAD instructions to be converted to
mnemonic code because three pairs of conditions in series lie in parallel to
each other.
0000 0001
0002 0003
0040 0005
0101
The first of each pair of conditions is converted to LOAD with the assigned bit
operand and then ANDed with the other condition. The first two blocks can
be coded first, followed by OR LOAD, the last block, and another OR LOAD,
or the three blocks can be coded first followed by two OR LOADs. The mne-
monic code for both methods is shown below.
0000 LD 0000
0001 AND NOT 0001
0002 LD NOT 0002
0003 AND NOT 0003
0004 OR LD ---
0005 LD 0004
0006 AND 0005
0007 OR LD ---
0008 OUT 0101
0000 LD 0000
0001 AND NOT 0001
0002 LD NOT 0002
0003 AND NOT 0003
0004 LD 0004
0005 AND 0005
0006 OR LD ---
0007 OR LD ---
0008 OUT 0101
Address Instruction Operands Address Instruction Operands
Again, with the method on the right, a maximum of eight blocks can be com-
bined. There is no limit to the number of blocks that can be combined with
the first method.
The Ladder Diagram Section 4-3