Intel PCI Video Game Controller User Manual


 
352 Software Developer’s Manual
Register Descriptions
Table 13-123. GORCL and GORCH Register Bit Description
13.7.32 Good Octets Transmitted Count
GOTCL (04090h; R)/ GOTCH (04094; R)
These registers make up a 64-bit register that counts the number of good (no errors) octets
transmitted. This register resets each time the upper 32 bits are read (GOTCH).
In addition, it sticks at FFFF_FFFF_FFFF_FFFFh when the maximum value is reached. This
register includes bytes transmitted in a packet from the <Destination Address> field through the
<CRC> field, inclusively. This register counts octets in successfully transmitted packets that are 64
or more bytes in length. This register only increments if transmits are enabled.
These octets do not include octets in transmitted flow control packets.
Table 13-124. GOTCL and GOTCH Register Bit Description
13.7.33 Receive No Buffers Count
RNBC (040A0h; R)
This register counts the number of times that frames were received when there were no available
buffers in host memory to store those frames (receive descriptor head and tail pointers were equal).
The packet is still received if there is space in the FIFO. This register only increments if receives
are enabled.
31 0 31 0
GORCH GORCL
Field Bit(s)
Initial
Value
Description
GORCL 31:0 0b Number of good octets received – lower 4 bytes.
GORCH 31:0 0b Number of good octets received – upper 4 bytes.
31 0 31 0
GOTCH GOTCL
Field Bit(s)
Initial
Value
Description
GOTCL 31:0 0b Number of good octets transmitted – lower 4 bytes.
GOTCH 31:0 0b Number of good octets transmitted – upper 4 bytes.