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The following timing example uses HR 0 as the results word.
Start input 0002
HR 000
Limits: 0001 to 0002
Count input (1805)
0000 0001 0002 0003 0004 00050004 0003 0002 00010000 99999998 9997 0000 00000000
HR 001
Limits: 0002 to 0004
Present value
Reset input (1804)
UP/DOWN selection (1806)
HR 015
Limits: 9980 to 9999
5-12 Data Shifting
This section describes the instructions that are used to create and manipu-
late shift registers. SFT(10) creates a single- or multiple-word register that
shift in a second execution condition when executed with an ON execution
condition. SFTR(84) creates a reversible shift register that is controlled
through the bits in a control word. WSFT(16) creates a multiple-word register
that shifts by word.
5-12-1 SHIFT REGISTER – SFT(10)
St : Starting word
IR, HR
E : End word
IR, HR
Operand Data Areas
Ladder Symbol
I
P
SFT(10)
St
E
R
E must be less than or equal to St, and St and E must be in the same data
area.
If a bit address in one of the words used in a shift register is also used in an
instruction that controls individual bit status (e.g., OUT, KEEP(11)), an error
(“COIL DUPL”) will be generated when program syntax is checked on the
Programming Console or another Programming Device. The program, how-
ever, will be executed as written. See
Example 2: Controlling Bits in Shift
Registers
for a programming example that does this.
Timing Example
Limitations
Data Shifting Section 5-12