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103
0000 LD 1813
0001 MOV(21)
# 0905
DM 32
0002 MOV(21)
# 1150
DM 33
0003 MOV(21)
# 1450
DM 34
0004 MOV(21)
# 1550
DM 35
0005 LD 1815
0006 OR 0005
0007 OUT 1807
0008 LD 0002
0009 HDM(61) 47
HR 0
0010 LD HR 000
0011 AND NOT 0011
0012 LD HR 001
0013 AND 0011
0014 OR LD
0015 AND 0006
0016 OR 0100
0017 AND NOT 0005
0018 OUT 0100
0019 LD 0005
0020 AND 0003
0021 OR 0102
0022 AND NOT 0100
0023 AND NOT 0004
0024 OUT 0102
0025 LD 0004
0026 AND NOT 0102
0027 OR 0103
0028 AND NOT 0003
0029 OUT 0103
0030 LD 0003
0031 DIFU(13) 1000
0032 LD 1000
0033 AND 0005
0034 OR 0101
0035 AND NOT 0006
0036 OUT 0101
Address Instruction Operands Address Instruction Operands
5-11-7 REVERSIBLE DRUM COUNTER – RDM(60)
N: TC number
Must be 46
Ladder Symbol
Definer Values
R: Result word
IR, HR, DM
Operand Data Areas
RDM(60) N
R
If any of the lower limits for the DM ranges are set to “0000,” the correspond-
ing output bits are turned ON when the counter is reset.
The reversible drum counter is a ring counter with a counting range of 0000
to 9999. It requires three input signals to operate: a count input, reset input,
and UP/DOWN selection input. For these inputs, SR bits 1804 to 1806 are
reserved and cannot be used for any other purpose while the RDM(60) is
being used.
Operation is enabled when RDM(60) is executed with an ON execution con-
dition. RDM(60) increments when the UP/DOWN selection input (1806) is
OFF. When this input is ON, RDM(60) decrements. Incrementing or decre-
menting occurs on the rising edge of the count input signal. When RDM(60)
is executed by the CPU, the value in the counter buffer is transferred to CNT
46.
Limitations
Description
Timer and Counter Instructions Section 5-11