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Index
216
reading and clearing messages, 162
SR area flags, 164
F
Factory Intelligent Terminal. See Peripheral Devices
First Cycle Flag. See instruction set
FIT. See Peripheral Devices
flags
execution affect, 69
usage, 10
Floppy Disk Interface Unit. See Peripheral Devices
G
GPC. See Peripheral Devices
Graphic Programming Console. See Peripheral Devices
Greater Than Flag. See data areas
H
HDM(61). See instruction set
high−speed drum counter reset. See data areas
HIGHSPEED DRUM COUNTER − HDM(61). See
instruction set
HIGHSPEED TIMER − TIMH(15). See instruction
set
HR area. See data areas
I
I/O bits available
in CPUs, 14
in Expansion I/O Units, 15
I/O REFRESH − IORF(97). See instruction set
I/O response time, 145
I/O Units. See Units
IL(02). See instruction set
ILC(03). See instruction set
input bit, definition of, 3
input devices, definition of, 3
input point, definition of, 3
input signal, definition of, 3
instruction set
ADD(30), 120
Analog Timer Unit, 87
AND, 73
combining with OR, 31
use in ladder diagrams, 30
AND LD, 74
combining with OR LD, 35
use in logic blocks, 33
AND NOT, 73
use in ladder diagrams, 30
BCD(24), 115
BIN(23), 115
CLC(41), 125
CMP(20), 112
CNT, 90
changing set value, 156
CNTR(12), 93
DIFD(14)
as a bit control instruction, 75
use in interlocks, 79
DIFU(13)
as a bit control instruction, 75
use in interlocks, 79
DIV(33), 124
DMPX(77), 118
END(01), 32, 81
ENDW(62), 135
HDM(61), 94
IL(02), 78
converting to mnemonic code, 72
use in branching, 42
ILC(03), 78
converting to mnemonic code, 72
use in branching, 42
IORF(97), 135
JME(05), 80
JMP(04), 80
KEEP(11)
as a bit control instruction, 77
controlling bit status, 60
LD, 73
use in ladder diagrams, 30
LD NOT, 73
use in ladder diagrams, 30
MLPX(76), 116
MOV(21), 111
MUL(32), 123
MVN(22), 112
NETW(63), 136
NOP(00), 81
NOT, 28
OR, 73
combining with AND, 31
use in ladder diagrams, 31
OR LD, 74
combining with AND LD, 35
use in logic blocks, 33, 34
OR NOT, 73
use in ladder diagrams, 31
OUT, 75
using to control bit status, 32
OUT NOT, 75
using to control bit status, 32
RDM(60), 103
RET(93), 126
SBN(92), 126
SBS(91), 126
SFT(10), 106
SFTR(84), 109
SNXT(09), 128
STC(40), 125
STEP(08), 128
SUB(31), 122
TIM, 83
changing set value, 156
TIMH(15), 86
WSFT(16), 110
INTERLOCK − IL(02). See instruction set
INTERLOCK CLEAR − ILC(03). See instruction set
IORF(97). See instruction set