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104
The transferred count value is then compared with the upper and lower limits
of a set of ranges which have been preset in DM 00 through DM 31. If the
current value is within any of the preset ranges, the corresponding bit of the
results word, R, is turned ON. The bit in the result word will remain ON until
the current value is no longer within the specified range.
When the reset input (1804) goes ON, the present value is cleared to 0000,
even if the start input is OFF, and all bits in R are set.
Note RDM(60) cannot be used to create a high-speed counter. If you require a
high-speed counter, use HDM(61).
When using the counter, the following bits are reserved and cannot be used
for any other purpose:
• SR bit 1804 (reset input)
• SR bit 1805 (count input)
• SR bit 1806 (UP/DOWN selection input)
• TC 46 (present count value)
• DM 00 to 31 (upper and lower limits)
If a power failure occurs, the count value of the counter immediately before
the power failure is retained.
The following table shows the upper and lower limits that need to be set in
DM 00 through DM 31. In this table, S is the present value of counter 46 and
R is the result word.
Lower limit Upper limit Present value of the counter Bit of R that
turns ON
DM 00 DM 01
Value of DM 00 ≤ S ≤ value of DM 01
00
DM 02 DM 03
Value of DM 02 ≤ S ≤ value of DM 03
01
DM 04 DM 05
Value of DM 04 ≤ S ≤ value of DM 05
02
DM 06 DM 07
Value of DM 06 ≤ S ≤ value of DM 07
03
DM 08 DM 09
Value of DM 08 ≤ S ≤ value of DM 09
04
DM 10 DM 11
Value of DM 10 ≤ S ≤ value of DM 11
05
DM 12 DM 13
Value of DM 12 ≤ S ≤ value of DM 13
06
DM 14 DM 15
Value of DM 14 ≤ S ≤ value of DM 15
07
DM 16 DM 17
Value of DM 16 ≤ S ≤ value of DM 17
08
DM 18 DM 19
Value of DM 18 ≤ S ≤ value of DM 19
09
DM 20 DM 21
Value of DM 20 ≤ S ≤ value of DM 21
10
DM 22 DM 23
Value of DM 22 ≤ S ≤ value of DM 23
11
DM 24 DM 25
Value of DM 24 ≤ S ≤ value of DM 25
12
DM 26 DM 27
Value of DM 26 ≤ S ≤ value of DM 27
13
DM 28 DM 29
Value of DM 28 ≤ S ≤ value of DM 29
14
DM 30 DM 31
Value of DM 30 ≤ S ≤ value of DM 31
15
Dedicated Bits
Note
Upper and Lower Limit
Setting
Timer and Counter Instructions Section 5-11