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Standard Commands for Programmable Instruments (SCPI)
101
STAT:QUES:COND?
Returns the value of the Questionable Condition register. That is a read-only register which holds the real-time (unlatched)
questionable status of the power supply.
Query Syntax STATus:QUEStionable:CONDition?
Examples STAT: QUES: COND? STATUS: QUESTIONABLE: CONDITION?
Returned Parameters <NRl>
(Register value)
STAT:QUES:ENAB
Sets or reads the value of the Questionable Enable register. The Questionable Enable register is a mask for enabling specific
bits in the Questionable Event register that can cause the questionable summary bit of the Status Byte register to be set. The
questionable summary bit (bit 3) is the logical OR of all the enabled bits in the Questionable Event register.
Command Syntax STATus:QUESionable:ENABle <NRf>
Parameters 0 to 32727
Default Value 0
Examples STAT: QUES: ENAB 20 STAT: QUES: ENAB 16
Query Syntax STAT:QUES:ENAB?
Returned Parameters <NRl>
(Register value)
STAT:QUES:EVEN?
Returns the value of the Questionable Event register. The Event register is a read-only register which holds (latches) all
events that:
♦
are enabled by the Questionable Enable register.
♦
are passed by the Questionable NTR and/or PTR filter.
Reading the Questionable Event register clears it.
Query Syntax STATus:QUESionable:EVENt?
Returned Parameters <NR1>
(Register Value)
Examples STAT: QUES: EVEN? STATUS: QUESTIONABLE: EVENT?
NTR/PTR Commands
These commands allow you to set or read the value of the Questionable NTR (Negative-
Transition) and PTR (Positive-Transistion) registers. These registers serve as polarity filters
between the Questionable Enable and Questionable Event registers to cause the following actions:
♦
When a bit of the Questionable NTR register is set to 1 then a 1-to-0 transition of a corresponding enabled bit of
Questionable Condition register will cause that bit to be set in the Questionable Event register.
♦ When a bit of the Questionable PTR register is set to 1 then a 0-to-1 transition of a corresponding enabled bit of
Questionable Condition register will cause that bit to be set in the Questionable Event register.
♦ If the same bits in both NTR and PTR registers are set to 1, then
any transition of that bit (if enabled) at the
Questionable Condition register will set the corresponding bit in the Questionable Event register.
♦ If the same bits in both NTR and PTR registers are set to 0, then
no transition of that bit (even if enabled) at the
Questionable Condition register can set the corresponding bit in the Questionable Event register.
NOTE If a Questionable bit is in the proper state, then programming thecorresponding PTR or NTR filter bit to 1
will set the associated EventRegister bit.