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Mnemonic
ADD
A,
R
ADD
A,@R
ADD
A,
#data
ADDC
A,
R
ADDC
A,@R
ADDC
A,
#data
ANL
A,
R
ANL
A,
@R
ANL
A,
"data
O<1LA,
R
g
ORL
A,
@R
.!!
ORL
A,
#data
~
E
XRLA,
R
~
u
XRL
A,
@R
u
«
XRLA,
#data
INCA
DECA
CLR
A
CPLA
DAA
SWAP A
RLA
RLCA
RR
A
RRCA
IN
A,
P
OUTL
P,
A
ANL
P,
#data
;;
ORL
P,
#data
Q.
;;
INS
A,
BUS
~
OUTL
BUS, A
ANL
BUS, #data
Q.
.:
OR L BUS, #data
MOVD
A, P
MOVD
P,
A
ANLD
P,
A
ORLD
P,
A
~
INCR
Ii
1;;
INC@R
'~
DEC
R
a:
JMP addr
JMPP@A
DJNZ
R, addr
JC
addr
JNC
addr
J Z
addr
JNZ
addr
~
JTO
addr
u
c
JNTO addr
=
ell
JT1 addr
JNT1
addr
JFO addr
JF
1 addr
JTF
addr
JNI
addr
JBb
addr
8048/8049
INSTRUCTION SET SUMMARY
Description
Bytes Cycle Mnemonic
Description
~
Jump to subroutine
c
CALL addr
Add
reg
ister
to
A
Return
Add data
memory
to
A 1
e
RET
Return
and
restore status
Add
immediate to A
2
..c
RETR
Add
register with
carry
~
V>
Add
data memory
with
carry
1
Add
immediate
with
carry
2 2
CLR
C Clear Carry
Complement
Carry
CPLC
And
register to A
1
~
Clear Flag 0
'"
CLR
FO
And data
memory
to
A 1
.!!
Complement
Flag 0
u.
CPL
FO
And
immediate to A
2 2
Or
register to A
CLR
F1
Clear Flag 1
Or
data
memory
to A
1
CPL
F1
Complement
Flag 1
Or
immediate to A
2 2
Exclusive
Or
register
to
A
1
MOV
A,
R
Move register to A
Exclusive or data
memory
to
A 1
MOV
A,@R
Move data memory to A
Exclusive or immediate to A 2
2
MOV
A,
#data Move immediate to A
Increment A
1
MOV
R, A Move A
to
register
Decrement A
MOV@R,A
Move A to data memory
Clear A
MOV
R, #data Move immediate to register
Complement
A
i;'!
MOV@R,#data
Move immed late to data
memory
>
Decimal Adjust A
0
MOV
A,
PSW
Move
PSW
to
A
:;:
Swap nibbles
of
A
~
MOV
PSW,
A Move A
to
PSW
Rotate
A
left
C
XCH
A,
R Exchange A and register
Rotate
A left through carry
XCHA,@R
Exchange A and data
memory
Bytes
2
2
2
2
Rotate
A right
XCHD
A,@R
Exchange nibble of A and register
Rotate
A right through carry
MOVX
A,@R
Move external data
memory
to
A
MOVX@R,A
Move A
to
external data
memory
Input
port
to A 2
MOVPA,@A
Move
to A
from
cu
rrent page
Output
A
to
port
2
MOVP3
A,@A
Move to A
from
Page
3
And immediate
to
port
2 2
Or
immediate to
port
2 2
MOV
A,
T Read
Timer/Counter
I
nput
BUS
to
A
2
~
MOV
T,
A
Load
Timer/Counter
Output
A
to
BUS
1
2
STRTT
Start
Timer
~
And
immediate
to
BUS
2 2
0
STRT
CNT
Start Counter
~
Or
immediate to
BUS
2 2
Ii STOP
TCNT
Stop
Timer/Counter
Input
Expander
port
to A 2
E
EN
TCNTI
Enable
Timer/Counter
Interrupt
Output
A to Expander
port
2
i=
DISTCNTI
Disable
Timer/Counter
Interrupt
And
A to Expander
port
2
Or
A
to
Expander
port
2
EN I Enable external interrupt
DIS
I Disable external
interrupt
Increment register
e
Select register bank 0
SEL
RBO
I ncrement data
memory
1:
SEL
RBl
Select register bank 1
Decrement register
0
SEL
MBO
Select
memory
bank 0
u
SEL
MBl
Select
memory
bank 1
Jump unconditional
2
2
ENTO
CLK
Enable
Clock
output
on TO
Jump
indi~ect
2
Decrement register and
jump
2
2
NOP
No
Operation
Jump
0"
Carry = 1 2
2
Jump on Carry = 0 2 2
Jump
on A Zero 2 2
Jump on A
not
Zero 2 2
Jump
on TO
~
1
2 2
Jump
on
TO
~
0
2 2
Jump
on
T1
~
1
2 2
Jump
on
Tl
~
0
2
2
Jump
on
FO
~
1
2 2
Jump
on
Fl
~
1
2
2
Jump on timer flag
=1
2
2
Jump
on
INT
~
0
2 2
Jump
on
Accumulator
Bit
2 2
Mnemonics
copyright
Intel Corporation 1976,
4·5
Cycles
2
2
2
1
2
2
2
2
2
2
2