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8.0 RAM USAGE
The
simulation program,
to
facilitate full usage
of
the
RAM, has organized it into a nominal block
of
64
registers, each
containing 16 main memory
locations and
four
status locations. Directives which reference
RAM
as such (i.e.,
0,
M,
and
0),
always address it by a register number, and sometimes by a character position within
the
register.
The
following
chart
illustrates this addressing scheme:
Bank
0
RAMO
(Port
0)
Bank 0
RAM
1
Bank 1
RAMO
(Port
4)
Bank
2
RAM
3
(Port
11)
Bank
4
RAMO
(Port
12)
Bank
4
RAM
3
(Port
15)
REGISTER
(selected
by
even
index
in SRC instr.)
0
1
2
3
4
5
6
7
8
9
·
·
16
17
18
19
20
·
·
·
44
45
46
47
48
49
50
51
52
·
·
·
60
61
62
63
0
DIGIT
(selected
by
odd
index
in SRC instr.)
[Status]
1 2
3
4 5 6
7 8 9
10
11
12
13
14
15
16
17
18
19
7