Filter
Top Products
Operating Instructions
52
Table 3-7 GP-IB Commands (continued)
Command
*Range or **Response
To Query Description
Page
T
TRG
Used to implement commands that have been sent
to and held by the power supply (power supply
continues to operate with previous values until
trigger command is received). See HOLD
command. The device trigger interface message
performs the same function.
59
STO x
RCL x
*0-15 Cause power supply to store and recall up to 16
sets of the complete machine state except for
output on/off. Machine state consists of:
programmed voltage (first and second rank),
programmed current (first and second rank), soft
voltage limit, soft current limit, delay time,
service request on/off, foldback (first and second
rank), mask (first and second rank), and hold.
Initial Condition: Each storage register is
initialized to the turn-on values.
60
STS? **STS xxx Used to read the contents of the status register,
which maintains the present status of the power
supply. See Table 3-9 for a description of each bit
in the status register, and the bit weight for each
condition.
60
ASTS? **ASTS xxx Used to read the contents of the accumulated-
status register, which stores any bit that was
entered in the status register since the
accumulated-status register was last read,
regardless of whether the condition still exists.
The bit descriptions and weights are the same as
in the status register, see Table 3-9.
61
UNMASK
mnemonics
UNMASK xxx
Determines which conditions are capable of
setting bits in the FAULT register; therefore,
allows operator to define which conditions are
fault conditions. Conditions can be enabled either
by sending a string of mnemonics after the
command UNMASK, or by sending the decimal
equivalent of the total bit weight for all conditions
to be enabled. The mnemonics and bit weights are
the same as in the status register, see Table 3-9.
Mnemonics are separated from each other by
commas, and may be sent in any combination and
in any order. The command UNMASK NONE
disables all conditions from setting bits in fault
register. Initial Condition: UNMASK NONE
62